Next autumn Xilinx plans to expand its 16nm Virtex UltraScale+ family to include a 35 billion transistor FPGA called VU19P, what it claims to be the world’s largest FPGA.
With 35 billion transistors, the VU19P provides the highest logic density and I/O count on a single device ever built, enabling emulation and prototyping of tomorrow’s most advanced ASIC and SoC technologies, as well as test, measurement, compute, networking, aerospace and defense-related applications.
Featuring 9 million system logic cells, up to 1.5 terabits per-second of DDR4 memory bandwidth and up to 4.5 terabits per-second of transceiver bandwidth and over 2,000 user I/Os, the new FPGA enables the prototyping and emulation of today’s most complex SoCs as well as the development of emerging, complex algorithms such as those used for artificial intelligence, machine learning, video processing and sensor fusion. The VU19P is 1.6X larger than its predecessor and what was previously the industry’s largest FPGA — the 20 nm Virtex UltraScale 440 FPGA.
“This is our third generation of world-record FPGAs. First was the Virtex-7 2000T, followed by the Virtex UltraScale VU440, and now the Virtex UltraScale+ VU19P,” says. Xilinx’s Sumit Shah.
“The VU19P enables developers to accelerate hardware validation and begin software integration before their ASIC or SoC is available,” said Sumit Shah, senior director, product line marketing and management, Xilinx.
The design flow can be co-optimized by using the Xilinx Vivado Design Suite, which reduces cost and tape-out risk, and improves efficiency and time-to-market. The VU19P will be generally available in the fall of 2020.